Category: FPGA projects

FPGA Data Transfer demo #5

Reading data from FPGA The FPGADevice class uses Opal Kelly Python API to: – load bitfile and configure the board using: okCFrontPanel.ConfigureFPGA(bit_file_path) – control data generation by integrating: okCFrontPanel.SetWireInValue(endpoint_addr, value) okCFrontPanel.ActivateTriggerIn(endpoint_addr,

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FPGA Data Transfer demo #4

This post will outline the setup of Python application and its usage examples. All necessary files can be found in the Wizzdev GitHub repository under fpga_data_transfer_demo/python/src. To perform data acquisition a

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FPGA Data Transfer demo #3

This post will describe the proposed FPGA application architecture. It is not meant to be a step by step tutorial, rather an overview with an explanation of main modules. For the

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FPGA Data Transfer demo #2

This post describes how to set up a project in Xilinx Vivado for writing and configuring the program for FPGA. If you are already familiar with Vivado you can skip this

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FPGA Data Transfer demo #1

This is the first post of a short tutorial series aiming to demonstrate the capabilities of high-speed data transfer using FPGA based platform and an elementary Python application. FPGA Data Transfer

FPGA Data Transfer demo #5

Reading data from FPGA The FPGADevice class uses Opal Kelly Python API to: – load bitfile and configure the board using: okCFrontPanel.ConfigureFPGA(bit_file_path) – control data generation by integrating: okCFrontPanel.SetWireInValue(endpoint_addr, value) okCFrontPanel.ActivateTriggerIn(endpoint_addr,

wizzdev image

FPGA Data Transfer demo #4

This post will outline the setup of Python application and its usage examples. All necessary files can be found in the Wizzdev GitHub repository under fpga_data_transfer_demo/python/src. To perform data acquisition a

wizzdev image

FPGA Data Transfer demo #3

This post will describe the proposed FPGA application architecture. It is not meant to be a step by step tutorial, rather an overview with an explanation of main modules. For the

wizzdev image

FPGA Data Transfer demo #2

This post describes how to set up a project in Xilinx Vivado for writing and configuring the program for FPGA. If you are already familiar with Vivado you can skip this

wizzdev image

FPGA Data Transfer demo #1

This is the first post of a short tutorial series aiming to demonstrate the capabilities of high-speed data transfer using FPGA based platform and an elementary Python application. FPGA Data Transfer

IoT in Space image

IoT in Space – Expanding Horizons

Spacetech future   Introduction   Space exploration is more advanced than ever before, and future generations might become modern-day Columbus. As we venture into space exploration deeper and deeper, we have

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